Hun-Seok KimAssociate Professor
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Hun-Seok Kim
Hun-Seok KimAssociate ProfessorElectrical Engineering and Computer Science
(734) 764-7630 2406 EECS1301 Beal AvenueAnn Arbor, MI 48109-2122

Journals and Conference Papers
Patents

Peer Reviewed Journal and Conference Papers

Technical areas of publications: [Algorithms Systems] [VLSI Architectures Circuits]

  1. Changwoo Lee, and Hun-Seok Kim “Differentiable Learning of Generalized Structured Matrices for Efficient Deep Neural Networks,” accepted to the International Conference on Learning Representations (ICLR), 2024 [Algorithms Systems]
  2. Qirui Zhang, Mehdi Saligane, Hun-Seok Kim, David Blaauw, Georgios Tzimpragos, Dennis Sylvester, “Quantum Circuit Simulation with Fast Tensor Decision Diagram,” accepted to the 25th International Symposium on Quality Electronic Design (ISQED’24) [Algorithms Systems]
  3. Qirui Zhang, Zichen Fan, Hyochan An, Zhehong Wang, Ziyun Li, Guanru Wang, Pierre Abillama, Hun-Seok Kim, David Blaauw, Dennis Sylvester, “RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2MB eMRAM,” accepted to IEEE Journal of Solid-State Circuits (JSSC), 2024 [VLSI Architectures Circuits]
  4. Chien-Wei Tseng, Zhen Feng, Zichen Fan, Hyochan An, Yunfan Wang, Hun-Seok Kim, and David Blaauw, “A Low Power Highly Reconfigurable Analog FIR Filter With 11-bit Charge-domain DAC for Narrowband Receivers,” accepted to IEEE Solid-State Circuits Letters (SSCL), 2024 [VLSI Architectures Circuits]
  5. Jungho Lee, Joseph G. Letner, Jongyup Lim, Gabriele Atzeni, Jiawei Liao, Abhilasha Kamboj, Bhavika Mani, Seokhyeon Jeong, Yejoong Kim, Yi Sun, Beomseo Koo, Julianna Richie, Elena della Valle, Paras R. Patel, Dennis Sylvester, Hun-Seok Kim, Taekwang Jang, Jamie Phillips, Cynthia A. Chestek, James Weiland, David Blaauw, “A Sub-mm³  Wireless Neural Stimulator IC for Visual Cortical Prosthesis with Optical Power Harvesting and 7.5 kbps Data Telemetry,” accepted to IEEE Journal of Solid-State Circuits (JSSC), 2024 [VLSI Architectures Circuits]
  6. Qirui Zhang, Hyochan An, Andrea Bejarano-Carbo, Hun-Seok Kim, David Blaauw, and Dennis Sylvester, “An Ultra-Low-Power H.264/AVC Intra-Frame Image Compression Accelerator for Intelligent Event-Driven IoT Imaging Systems,” accepted to IEEE Solid-State Circuits Letters (SSCL), 2024 [VLSI Architectures Circuits]
  7. Yunfan Wang, Steve Young, Demba Komma, Jaechan Lim, Zhen Feng, Zichen Fan, Chien-wei Tseng, Hun-Seok Kim, and David Blaauw, “Global Localization of Energy-Constrained Miniature RF Emitters using Low Earth Orbit Satellites,” in the ACM Conference on Embedded Networked Sensor Systems (SenSys) 2023 [Algorithms Systems]
  8. Heejin Yang, Ji-Hwan Seok, Rohit Rothe, Zichen Fan, Qirui Zhang, Hun-Seok Kim, David Blaauw, Dennis Sylvester, “A 1.5μW Fully-Integrated Keyword Spotting SoC in 28nm CMOS with Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping,” in IEEE Journal of Solid-State Circuits (JSSC) [VLSI Architectures Circuits]
  9. Sara Shoouri, Mingyu Yang, Zichen Fan, Hun-Seok Kim, “Efficient Computation Sharing for Multi-Task Visual Scene Understanding,” in the CVF/IEEE International Conference on Computer Vision (ICCV) 2023 [Algorithms Systems]
  10. Noah Michels, Abbas Jinia, Shaun Clarke, Hun-Seok Kim, Sara Pozzi, David Wentzloff, “Real-Time Classification of Radiation Pulses with Piled-Up Recovery Using an FPGA-Based Artificial Neural Network,” in IEEE Access, 2023 [VLSI Architectures Circuits]
  11. Anish Krishnakumar, Hanguang Yu, Tutu Ajayi, A. Alper Goksoy, Vishrut Pandey, Joshua Mack, Sahil Hassan, Kuan-Yu Chen, Chaitali Chakrabarti, Daniel W. Bliss, Ali Akoglu, Hun-Seok Kim, Ronald G. Dreslinski, David Blaauw, Umit Y. Ogras, “FALCON: An FPGA Emulation Platform for Domain-Specific Systems-on-Chip (DSSoCs),” in IEEE Design & Test, doi: 10.1109/MDAT.2023.3291331 [VLSI Architectures Circuits]
  12. Pierre Abillama, Zichen Fan, Yu Chen, Hyochan An, Qirui Zhang, Seungkyu Choi, David Blaauw, Dennis Sylvester, Hun-Seok Kim, “SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights,” accepted to IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2023, Best Paper Award [VLSI Architectures Circuits]
  13. Chenghong Bian, Chin-Wei Hsu, Changwoo Lee, Hun-Seok Kim, “Learning-Based Near-Orthogonal Superposition Code for MIMO Short Message Transmission,” in the IEEE Transactions on Communications, 2023 [Algorithms Systems]
  14. Zichen Fan, Qirui Zhang, Pierre Abillama, Sara Shoouri, Changwoo Lee, David Blaauw, Hun-Seok Kim, Dennis Sylvester, “TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing,” in the International Symposium on Computer Architecture (ISCA) 2023 [VLSI Architectures Circuits]
  15. A. J. Jinia, T.E. Maurer, C. A. Meert, O. V. Pakari, S. D. Clarke, H. S. Kim, D. D. Wentzloff, and S. A. Pozzi, “Prompt Photofission Neutron Detection in Depleted Uranium,” in Physical Review Applied, 2023 [Algorithms Systems]
  16. Chien-Wei Tseng, Zhen Feng, Zichen Fan, Hyochan An, Yunfan Wang, Hun-Seok Kim, David Blaauw, “A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband Receivers,” in the IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2023 [VLSI Architectures Circuits]
  17. Jungho Lee, Joseph Letner, Jongyup Lim, Yi Sun, Seokhyeon Jeong, Yejoong Kim, Beomseo Koo, Gabriele Atzeni, Jiawei Liao, Julianna Richie, Elena della Valle, Paras Patel, Taekwang Jang, Cynthia Chestek, Jamie Phillips, James Weiland, Dennis Sylvester, Hun-Seok Kim, David Blaauw, “A Wireless Neural Stimulator IC for Cortical Visual Prosthesis,” in the IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2023 [VLSI Architectures Circuits]
  18. Chin-Wei Hsu, Achilleas Anastasopoulos, and Hun-Seok Kim, “Instantaneous Feedback-based Opportunistic Symbol Length Adaptation for Reliable Communication,” in the IEEE Transactions on Communications, 2023 [Algorithms Systems]
  19. Bowen Liu, Yu Chen, Rakesh Chowdary Machineni, Shiyu Liu, Hun-Seok Kim, “MMVC: Learned Multi-Mode Video Compression with Block-based Prediction Mode Selection and Density-Adaptive Entropy Coding,” in the IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2023 [Algorithms Systems]
  20. Yu Chen, Mingyu Yang, Hun-Seok Kim, “Search for efficient deep visual-inertial odometry through neural architecture search,” in the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2023 [Algorithms Systems]
  21. Chin-Wei Hsu, and Hun-Seok Kim, “Hyper-Dimensional Modulation for Robust Short Packets in Massive Machine-Type Communications,” in the IEEE Transactions on Communications, 2023 [Algorithms Systems]
  22. Boxuan Chang, Chenyu Wang, and Hun-Seok Kim, “Deep Learning-Based Joint Channel Coding and Frequency Modulation for Low Power Connectivity,” in the IEEE International Conference on Communications (ICC) 2023 [Algorithms Systems]
  23. Changwoo Lee, Xiao Xu, and Hun-Seok Kim, “Deep Joint Source Channel Coding with Iterative Source Error Correction,” in the Artificial Intelligence and Statistics (AISTATS) 2023 [Algorithms Systems]
  24. Hyochan An, Yu Chen, Zichen Fan, Qirui Zhang, Pierre Abillama, Hun-Seok Kim, David Blaauw, Dennis Sylvester, “A 8.09 TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees,” in the IEEE International Solid State Circuits Conference (ISSCC) 2023 [VLSI Architectures Circuits]
  25. Ji-Hwan Seol, Heejin Yang, Rohit Rothe, Zichen Fan, Qirui Zhang, Hun-Seok Kim, David Blaauw, Dennis Sylvester, “A 1.5μW End-to-End Keyword Spotting SoC with Content-Adaptive Frame Sub-Sampling and Fast-Settling Analog Frontend,” in the IEEE International Solid State Circuits Conference (ISSCC) 2023 [VLSI Architectures Circuits]
  26. Xin He, Kuan-Yu Chen, Siying Feng, Hun-Seok Kim, David Blaauw, Ronald Dreslinski, Trevor Mudge, “Squaring the Circle: Executing Sparse Matrix Computations on Flex TPU – a TPU-like processor,” in the 31st International Conference on Parallel Architectures and Compilation Techniques (PACT) 2023 [VLSI Architectures Circuits]
  27. Mingyu Yang, Yu Chen, Hun-Seok Kim, “Efficient Deep Visual and Inertial Odometry with Modality Selection,” in the European Conference on Computer Vision (ECCV) 2022 [Algorithms Systems]
  28. Yufan Yue, Tutu Ajayi, Xueyang Liu, Peiwen Xing, Zihan Wang, David Blaauw, Ronald Dreslinski, Hun-Seok Kim, “A Unified Forward Error Correction Accelerator for Multi-Mode Turbo, LDPC, and Polar Decoding,” in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) 2022 [VLSI Architectures Circuits]
  29. Yan Xiong, Jingtao Li, David Blaauw, Hun-Seok Kim, Trevor Mudge, Ronald Dreslinski, and Chaitali Chakrabarti. “Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration,” in 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022 [VLSI Architectures Circuits]
  30. Joseph T. Costello, Samuel R. Nason, Hyochan An, Jungho Lee, Matthew J. Mender, Hisham Temmar, Dylan M. Wallace, Jongyup Lim, Matthew S. Willsey, Parag G. Patil, Taekwong Jang, Jamie D. Phillips, Hun-Seok Kim, David Blaauw, Cynthia A. Chestek, “A low-power communication scheme for wireless, 1000 channel brain-machine interfaces,” in Journal of Neural Engineering (JNE), 2022 [Algorithms Systems] [VLSI Architectures Circuits]
  31. Hyochan An, Samuel Nason-Tomaszewski, Jongyup Lim, Kyumin Kwon, Matthew Willsey, Parag Patil, Hun-Seok Kim, Dennis Sylvester, Cynthia Chestek, and David Blaauw, “A Power-Efficient Brain-Machine Interface System with a Sub-mW Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates,” in IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), 2022 [VLSI Architectures Circuits]
  32. D. W. Bliss et al., “Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor,” 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 443-447, doi: 10.1109/ISCAS48785.2022.9937602 [VLSI Architectures Circuits]
  33. Sara Shoouri, Mingyu Yang, Gordy Carichner, Yuyang Li, Ehab A.Hamed, Angela Deng, Delbert A. Green II, Inhee Lee, David Blaaw, and Hun-Seok Kim, “Siamese Learning-Based Monarch Butterfly Localization,” in IEEE Data Science and Learning Workshop (DSLW), 2022 [Algorithms Systems]
  34. Kuan-Yu Chen, Chi-Sheng Yang, Yu-Hsiu Sun, Chien-Wei Tseng, Morteza Fayazi, Xin He, Siying Feng, Yufan Yue, Trevor Mudge, Ronald Dreslinski, Hun-Seok Kim, David Blaauw, “A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2022 [VLSI Architectures Circuits]
  35. Zichen Fan, Hyochan An, Qirui Zhang, Boxun Xu, Li Xu, Chien-wei Tseng, Yimai Peng, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, Fanghao Liu, Guanru Wang, Shenghao Jiang, Hun-Seok Kim, David Blaauw, Dennis Sylvester, “Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2022 [VLSI Architectures Circuits]
  36. Qirui Zhang, Hyochan An, Zichen Fan, Zhehong Wang, Ziyun Li, Guanru Wang, Hun-Seok Kim, David Blaauw, and Dennis Sylvester, “A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2022 [VLSI Architectures Circuits]
  37. Gabriele Atzeni, Jongyup Lim, Jiawei Liao, Alessandro Novello, Jungho Lee, Eunseong Moon, Michael Barrow, Joseph Letner, Joseph Costello, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David Blaauw, Taekwang Jang, “A 260×274 μm2 572 nW Neural Recording Micromote Using Near-Infrared Power Transfer and an RF Data Uplink,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2022 [VLSI Architectures Circuits]
  38. Mingyu Yang, Chenghong Bian, Hun-Seok Kim, “OFDM-guided Deep Joint Source Channel Coding for Wireless Multipath Fading Channels”, in IEEE Transactions on Cognitive Communications and Networking (IEEE TCCN), 2022 [Algorithms Systems]
  39. Andrea Bejarano-Carbo, Hyochan An, Kyojin Choo, Shiyu Liu, Dennis Sylvester, David Blaauw, Hun-Seok Kim, “Millimeter-Scale Ultra-Low-Power Imaging System for Intelligent Edge Monitoring,” in the tinyML Research Symposium, 2022, Best Paper Award [Algorithms Systems] [VLSI Architectures Circuits]
  40. Mingyu Yang, Hun-Seok Kim, “Deep Joint Source-Channel Coding for Wireless Image Transmission with Adaptive Rate Control,” in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2022 [Algorithms Systems]
  41. Yu Chen, Bowen Liu, Zijian Zhang, Hun-Seok Kim, “An End-to-end Deep Learning Framework for Multiple Audio Source Separation and Localization,” in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2022 [Algorithms Systems]
  42. Chenghong Bian, Mingyu Yang, Chin-Wei Hsu, Hun-Seok Kim, “Deep Learning Based Near-Orthogonal Superposition Code for Short Message Transmission,” in IEEE International Conference on Communications (ICC) 2022 [Algorithms Systems]
  43. Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor Mudge, Chaitali Chakrabarti, David Blaauw, Ronald Dreslinski, Hun-Seok Kim, “Versa: A 36-Core Systolic Multiprocessor with Dynamically-Reconfigurable Interconnect and Memory,” in IEEE Journal of Solid-State Circuits (JSSC) [VLSI Architectures Circuits]
  44. Jongyup Lim, Jungho Lee, Eunseong Moon, Michael Barrow, Gabriele Atzeni, Joseph G. Letner, Joseph T. Costello, Samuel R. Nason, Paras R. Patel, Yi Sun, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David Blaauw, Dennis Sylvester, and Taekwang Jang, “A Light Tolerant Wireless Neural Recording IC for Motor Prediction with Near-Infrared-based Power and Data telemetry,” in IEEE Journal of Solid-State Circuits (JSSC) [VLSI Architectures Circuits]
  45. Chien-Wei Tseng, Demba Komma, Kuan-Yu Chen, Rohit Rothe, Zhen Feng, Makoto Yasuda, Masaru Kawaminami, Hun-Seok Kim, David Blaauw, “A Long-Range Narrowband RF Localization System with a Crystal-Less Frequency-Hopping Receiver,” in IEEE International Solid State Circuits Conference (ISSCC), 2022 [VLSI Architectures Circuits]
  46. Chin-Wei Hsu, Achilleas Anastasopoulos, and Hun-Seok Kim, “Instantaneous Feedback-based Opportunistic Symbol Length Adaptation for Reliable Communication,” in IEEE Globecom 2021 [Algorithms Systems]
  47. A. J. Jinia, T. E. Maurer, C. A. Meert, M. Y. Hua, S. D. Clarke, H. S. Kim, D. D. Wentzloff, and S. A. Pozzi, “An Artificial Neural Network System for Photon- Based Active Interrogation Applications,” in IEEE Access [Algorithms Systems]
  48. Inhee Lee, Roger Hsiao, Gordy Carichner, Chin-Wei Hsu, Mingyu Yang, Sara Shoourl, Katherine Ernst, Tess Carichner, Yuyang Li, Jaechan Lim, Cole R. Julick, Eunseong Moon, Yi Sun, Jamie Phillips, M. Isabel Ramirez, Kristi L. Montooth, Delbert A. Green II, Hun-Seok Kim, and David Blaauw, “mSAIL: Milligram-Scale Multi-Modal Sensor Platform for Monarch Butterfly Migration Tracking,” in the 27th Annual International Conference on Mobile Computing and Networking (Mobicom) 2021, Best Paper Award [Algorithms Systems] [VLSI Architectures Circuits]
  49. Yu Chen, Bowen Liu, Pierre Abillama and Hun-Seok Kim, “HTNN: Deep Learning in Heterogeneous TransformDomains with Sparse-Orthogonal Weights,” in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2021 [Algorithms Systems]
  50. Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor Mudge, Chaitali Chakrabarti, David Blaauw, Ronald Dreslinski, Hun-Seok Kim, “Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2021 [VLSI Architectures Circuits]
  51. Jongyup Lim, Jungho Lee, Eunseong Moon, Michael Barrow, Gabriele Atzeni, Joseph Letner, Joseph Costello, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David Blaauw, Dennis Sylvester, Taekwang Jang, “A Light Tolerant Neural Recording IC for Near-Infrared-Powered Free Floating Motes,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium), 2021 [VLSI Architectures Circuits]
  52. Bowen Liu, Yu Chen, Shiyu Liu, Hun-Seok Kim, “Deep Learning in Latent Space for Video Prediction and Compression,” in IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2021 [Algorithms Systems]
  53. Eunseong Moon, Michael Barrow, Jongyup Lim, Jungho Lee, Samuel Nason, Joseph Costello, Hun Seok Kim, Cynthia Chestek, Taekwang Jang, David Blaauw, Jamie Phillips, “Bridging the Last Millimeter Gap of Brain-Machine Interfaces via Near-Infrared Wireless Power Transfer and Data Communications,” in ACS Photonics, 2021 [VLSI Architectures Circuits]
  54. Mingyu Yang, Chenghong Bian, and Hun-Seok Kim, “Deep Joint Source Channel Coding for Wireless Image Transmission with OFDM,” in IEEE International Conference on Communications (ICC), 2021 [Algorithms Systems]
  55. S. Feng, J. Sun, S. Pal, K. Kaszyk, X. He, D.-h. Park, J. Morton, D. Blaauw, H.-S. Kim, T. Mudge, M. Cole, M. O’Boyle, C. Chakrabarti and R. Dreslinski, “CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics,” in IEEE/ACM Design Automation Conference (DAC), 2021 [VLSI Architectures Circuits]
  56. Najme Ebrahimi, Hun Seok Kim, and David Blaauw, “Physical Layer Secret Key Generation Using Joint Interference and Phase-Shift Keying Modulation,” in IEEE Transactions on Microwave Theory and Techniques, 2021 [VLSI Architectures Circuits]
  57. Ziyun Li, Zhehong Wang, Li Xu, Qing Dong, Bowen Liu, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David Blaauw, “RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-on-Chip DNN Accelerator,” in IEEE Journal of Solid-State Circuits (JSSC), 2021 [VLSI Architectures Circuits]
  58. Jingcheng Wang, Hyochan An, Qirui Zhang, Hun-Seok Kim, David Blaauw, and Dennis Sylvester, “A 40nm Ultra-low Leakage Voltage-Stacked SRAM for Intelligent IoT Sensors,” in IEEE Solid-State Circuits Letters (SSCL), 2021
  59. Hyochan An, Sam Schiferl, Siddharth Venkatesan, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Luyao Gong, Hengfei Zhong, David Blaauw, Ronald Dreslinski, Hun Seok Kim, and Dennis Sylvester, “An Ultra-low-power Image Signal Processor for Hierarchical Image Recognition with Deep Neural Networks,” in  IEEE Journal of Solid-State Circuits (JSSC), 2021 [VLSI Architectures Circuits]
  60. Chin-Wei Hsu, and Hun-Seok Kim, “Non-Orthogonal Modulation for Short Packets in Massive Machine Type Communications,” in IEEE Globecom, 2020 [Algorithms Systems]
  61. Pengqi Lu, Jaechan Lim, Roland Graf, and Hun-Seok Kim, “iGYM: An Inclusive Augmented Reality Exergame for People of All Abilities,” in IEEE International Workshop on Signal Processing Systems (SiPS), 2020 [Algorithms Systems]
  62. Samuel R. Nason, Alex K. Vaskov, Matthew S. Willsey, Elissa J. Welle, Hyochan An, Philip P. Vu, Autumn J. Bullard, Chrono S. Nu, Jonathan C. Kao, Krishna V. Shenoy, Taekwang Jang, Hun-Seok Kim, David Blaauw, Parag G. Patil, and Cynthia A. Chestek, “Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture,” in Nature Biomedical Engineering, 2020. Doi: 10.1038/s41551-020-0591-0 [VLSI Architectures Circuits]
  63. Subhankar Pal, Siying Feng, Dong-hyeon Park, Sung Kim, Aporva Amarnath, Chi-Sheng Yang, Xin He, Jonathan Beaumont, Kyle May, Yan Xiong, Kuba Kaszyk, John Magnus Morton, Jiawen Sun, Michael O’Boyle, Murray Cole, Chaitali Chakrabarti, David Blaauw, Hun-Seok Kim, Trevor Mudge, and Ronald Dreslinski, “Transformer: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration,” inThe International Conference on Parallel Architectures and Compilation Techniques (PACT) 2020 (PACT 2020) [VLSI Architectures Circuits]
  64. Yan Xiong, Jian Zhou, Subhankar Pal, David Blaauw, Hun-Seok Kim, Trevor Mudge, Ronald Dreslinski, and Chaitali Chakrabarti, “Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture,” in IEEE International Symposium on Circuits & Systems (ISCAS) 2020 [VLSI Architectures Circuits]
  65. Yao-Shan Hsiao, Mingyu Yang, Hun-Seok Kim, “Super-Resolution Time-of-Arrival Estimation using Neural Networks,” in the 28th European Signal Processing Conference (EUSIPCO 2020) [Algorithms Systems]
  66. Mingyu Yang, Roger Hsiao, Gordy Carichner, Katherine Ernst, Jaechan Lim, Delbert Green, Inhee Lee, David Blaauw, Hun-Seok Kim, “Migrating Monarch Butterfly Localization using Multi-Modal Sensor Fusion Neural networks,” in the 28th European Signal Processing Conference (EUSIPCO 2020) [Algorithms Systems]
  67. Jongyup Lim, Myungjoon Choi, Bowen Liu, Taewook Kang, Ziyun Li, Zhehong Wang, Yiqun Zhang, Kaiyuan Yang, David Blaauw, Hun-Seok Kim, and Dennis Sylvester, “AA-ResNet: Energy Efficient All-Analog ResNet Accelerator,” in the 63rd IEEE International Midwest Symposium on Circuits and Systems [VLSI Architectures Circuits]
  68. Hyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Hengfei Zhong, Luyao Gong, David Blaauw, Ronald Dreslinski, Dennis Sylvester, and Hun-Seok Kim, “A 170uW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium) 2020 [VLSI Architectures Circuits]
  69. Jingcheng Wang, Hyochan An, Qirui Zhang, Hun-Seok Kim, David Blaauw, Dennis Sylvester, “1.03pW/b Ultra-low Leakage Voltage-Stacked SRAM for Intelligent Edge Processors,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium) 2020 [VLSI Architectures Circuits]
  70. Zhehong Wang, Ziyun Li, Qing Dong, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David Blaauw, “An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium) 2020 [VLSI Architectures Circuits]
  71. Bowen Liu, Ang Cao, Hun-Seok Kim, “Unified Signal Compression using Generative Adversarial Networks,” in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2020 [Algorithms Systems]
  72. Zhen Feng, Li-Xuan Chuo, Yao Shi, Yejoong Kim, Hun-Seok Kim, David Blaauw, “A mm-Scale Sensor Node with 2.7GHz 1.3uW Transceiver using Full-Duplex Self-Coherent Backscattering Protocol Achieving 3.5m Range,” accepted to IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2020 [VLSI Architectures Circuits]
  73. Anuraag Soorishetty, Jian Zhou, Subhankar Pal, David Blaauw, Hun Seok Kim, Trevor Mudge, Ronald Dreslinski, Chaitali Chakrabarti, “Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture,” in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2020 [VLSI Architectures Circuits]
  74. Jongyup Lim, Eunseong Moon, Michael Barrow, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Sechang Oh, Inhee Lee, Hun-Seok Kim, Dennis Sylvester, David Blaauw, Cynthia A. Chestek, Jamie Phillips, Taekwang Jang, “A 0.19×0.17mm2 Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data Telemetry,” in IEEE International Solid State Circuits Conference (ISSCC), 2020 [VLSI Architectures Circuits]
  75. Dong-hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Taylor, Trevor Mudge, David Blaauw, Hun-Seok Kim, Ronald Dreslinski, “A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator,” in  IEEE Journal of Solid-State Circuits (JSSC), 2020 [VLSI Architectures Circuits]
  76. Jaechan Lim, Hun-Seok Kim, and Hyung-Min Park, “Interactive-Multiple-Model Algorithm based on Minimax Particle Filtering,” in  IEEE Signal Processing Letters, 2019 [Algorithms Systems]
  77. Jaechan Lim, Hun-Seok Kim, and Hyung-Min Park, “Minimax Particle Filtering for Tracking a Highly Maneuvering Target,” in  International Journal of Robust and Nonlinear Control, 2019 [Algorithms Systems]
  78. Li-Xuan Chuo, Zhen Feng, Yejoong Kim, Nikolaos Chiotellis, Makoto Yasuda, Satoru Miyoshi,Masaru Kawaminami, Anthony Grbic, David Wentzloff, David Blaauw, and Hun-Seok Kim, “Millimeter-Scale Node-to-Node Radio Using a Carrier Frequency Interlocking IF Receiver for a Fully Integrated 4x4x4mm3 Wireless Sensor Node,” in  IEEE Journal of Solid-State Circuits (JSSC), 2019 [VLSI Architectures Circuits]
  79. Sechang Oh, Minchang Cho, Zhan Shi, Yejoong Kim, Seokhyeon Jeong, Yu Chen, Rohit Rothe, David Blaauw, Hun-Seok Kim, and Dennis Sylvester, “An Acoustic Signal Processing Chip with 142 nW Voice Activity Detection Using Mixer- Based Sequential Frequency Scanning and Neural Network Classification,” in  IEEE Journal of Solid-State Circuits (JSSC) 2019 [VLSI Architectures Circuits]
  80. Abdullah Alghaihab, Yao Shi, Jacob Breiholz, Hun-Seok Kim, Benton H. Calhoun, David D. Wentzloff, “Enhanced Interference Rejection Bluetooth Low-Energy Back- Channel Receiver with LO Frequency Hopping,” in  IEEE Journal of Solid-State Circuits (JSSC) 2019 [VLSI Architectures Circuits]
  81. Roland Graf, Pallavi Benawri, Amy E Whitesall, Dashiell Carichner, Zixuan Li, Michael Nebeling, and Hun Seok Kim, “iGYM: An Interactive Floor Projection System for Inclusive Exergame Environments,” In Proceedings of the 2019 Annual Symposium on Computer-Human Interaction in Play (CHI PLAY ’19), 2019, ACM. Best Paper Award [Algorithms Systems]
  82. Chin-Wei Hsu, and Hun-Seok Kim, “Collision-Tolerant Narrowband Communication using Non-Orthogonal Modulation and Multiple Access,” in  IEEE Globecom 2019 [Algorithms Systems]
  83. Subhankar Pal, Dong-hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Taylor, Trevor Mudge, David Blaauw, Hun-Seok Kim, Ronald Dreslinski, “A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium) 2019 [VLSI Architectures Circuits]
  84. Sechang Oh, Minchang Cho, Xiao Wu, Yejoong Kim, Li-Xuan Chuo, Wootaek Lim, Pat Pannuto, Suyoung Bang, Kaiyuan Yang, Hun-Seok Kim, Dennis Sylvester, David Blaauw, “IoT2 — the Internet of Tiny Things: Realizing mm-Scale Sensors through 3D Die Stacking,” in IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE) 2019 [VLSI Architectures Circuits]
  85. Li-Xuan Chuo, Yejoong Kim, Nikolaos Chiotellis, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Anthony Grbic, David Wentzloff, Hun-Seok Kim, David Blaauw, “A 4×4×4-mm3 Fully Integrated Sensor-to-Sensor Radio using Carrier Frequency Interlocking IF Receiver with -94 dBm Sensitivity,” in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2019. Best Student Paper Award [VLSI Architectures Circuits]
  86. Najme Ebrahimi, Behzad Yektakhah, Kamal Sarabandi, Hun Seok Kim, David Wentzloff, David Blaauw, “A Novel Physical Layer Security Technique Using Master-Slave Full Duplex Communication,” in IEEE MTT International Microwave Symposium (IMS), 2019 [Algorithms Systems]
  87. Mingyu Yang, Li-Xuan Chuo, Karan Suri, Lu Liu, Hao Zheng , Hun-Seok Kim, “iLPS: Local Positioning System with Simultaneous Localization and Wireless Communication”, in IEEE International Conference on Computer Communications (INFOCOM), 2019. Best In-Session Presentation Award [Algorithms Systems]
  88. Ziyun Li, Yu Chen, Luyao Gong, Lu Liu , Dennis Sylvester, David Blaauw, Hun-Seok Kim, “An 879GOPS 243mW 80fps VGA Fully Visual CNN-SLAM Processor for Wide-Range Autonomous Exploration”, in IEEE International Solid State Circuits Conference (ISSCC), 2019 [VLSI Architectures Circuits]
  89. Minchang Cho, Sechang Oh, Zhan Shi, Jongyup Lim, Yejoong Kim, Seokhyeon Jeong , Yu Chen, David Blaauw, Hun-Seok Kim, Dennis Sylvester, “A 142nW Voice and Acoustic Activity Detection Chip for mm-Scale Sensor Nodes Using Time-Interleaved Mixer- Based Frequency Scanning”, in IEEE International Solid State Circuits Conference (ISSCC), 2019 [VLSI Architectures Circuits]
  90. Yao Shi, Xing Chen, Hun-Seok Kim, David Blaauw, David Wentzloff, “A 606-μW Millimeter-Scale Bluetooth Low Energy Transmitter using Co-Designed 3.5×3.5 mm2 Loop Antenna and Transformer-Boost Power Oscillator”, in IEEE International Solid State Circuits Conference (ISSCC), 2019 [VLSI Architectures Circuits]
  91. Ziyun Li, Jiang Xiang, Luyao Gong, David Blaauw, Chaitali Chakrabarti, and Hun Seok Kim, “Low Complexity, Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low Power Mobile Vision Applications,” in IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), 2018 [Algorithms Systems] [VLSI Architectures Circuits]
  92. Yue Dai, Wenhao Peng, Yu Wang, Li-Xuan Chuo, Karan Suri, Hao Zheng, David Wentzloff, and Hun-Seok Kim, “Implementation and Evaluation of Bi-Directional WiFi Back-channel Communication,” in IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC) 2018 [Algorithms Systems]
  93. Ziyun Li, Jingcheng Wang, Dennis Sylvester, David Blaauw, and Hun-Seok Kim, “A 1920×1080 25fps 2.4TOPS/W Low Power 6D-Vision Processor for Unified Optical Flow and Stereo Depth Semi-Global Matching,” in  IEEE Journal of Solid-State Circuits (JSSC), invited, 2018 [VLSI Architectures Circuits]
  94. Jaeho Im, Hun-Seok Kim, David D. Wentzloff, “A 470µW -92.5dBm OOK/FSK Receiver for IEEE 802.11 WiFi LP-WUR,” in IEEE European Solid-State Circuits conference 2018 [VLSI Architectures Circuits]
  95. Ziyun Li, Jingcheng Wang, Dennis Sylvester, David Blaauw, and Hun-Seok Kim, “A 1920 × 1080 25fps, 2.4TOPS/W Unified Optical Flow and Depth 6D Vision Processor for Energy-Efficient, Low Power Autonomous Navigation,” in the IEEE Symposium on VLSI Circuits (VLSI-Symposium) 2018 [VLSI Architectures Circuits]
  96. C. Fu, A. Di Fulvio, S.D. Clarke, D. Wentzloff, S.A. Pozzi, H.S. Kim, “Artificial neural network algorithms for pulse shape discrimination and recovery of piled-up pulses in organic scintillators,” in Annals of Nuclear Energy 120 (2018) 410–421 [Algorithms Systems]
  97. Hun-Seok Kim, “HDM: Hyper-Dimensional Modulation for Robust Low-Power Communications,” in the IEEE International Conference on Communications (ICC) 2018 [Algorithms Systems]
  98. Xing Chen, Jacob Breiholz, Farah Yahya, Christopher Lukas, Hun-Seok Kim, Ben Calhoun, David D. Wentzloff, “A 486 µW All-Digital Bluetooth Low Energy Transmitter with Ring Oscillator Based ADPLL for IoT applications,” in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2018 [VLSI Architectures Circuits]
  99. Abdullah Alghaihab, Ben Calhoun, Hun-Seok Kim, David D. Wentzloff, “A 150 µW -57.5 dBm-Sensitivity Bluetooth Low-Energy Back-Channel Receiver with LO Frequency Hopping,” in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2018 [VLSI Architectures Circuits]
  100. Jaeho Im, Hun-Seok Kim, David D. Wentzloff, “A 217µW -82dBm IEEE 802.11 Wi-Fi LP-WUR using a 3rd-Harmonic Passive Mixer,” in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2018 [VLSI Architectures Circuits]
  101. Abdullah Alghaihab, Hun-Seok Kim, David D. Wentzloff, “Analysis of Circuit Noise and Non-ideal Filtering Impact on Energy Detection Based Ultra-Low-Power Radios Performance,” in IEEE Transactions on Circuits and Systems–II: Express Briefs [VLSI Architectures Circuits]
  102. Hyeongseok Kim, Nikolaos Chiotellis, Elnaz Ansari, Muhammad Faisal, Taekwang Jang, Anthony Grbic, Hun-Seok Kim, David Blaauw, David Wentzloff, “A Receiver/Antenna Co-Design for a 1.5mJ per Fix Fully-Integrated 10x10x6mm3 GPS Logger,” in IEEE Custom Integrated Circuits Conference, 2018 [VLSI Architectures Circuits]
  103. Avish Kosari, Hun-Seok Kim, David D. Wentzloff, “A MURS Band Digital Quadrature Transmitter with Class-B I/Q Cell Sharing for Long Range IoT Applications” in the IEEE Transactions on Circuits and Systems II: Express Briefs [VLSI Architectures Circuits]
  104. S. Pal, J. Beaumont, D.-H. Park, A. Amarnath, S. Feng, C. Chakrabarti, H.-S. Kim, D. Blaauw, T. Mudge, and R. Dreslinski, “OuterSPACE: An Outer Product based Sparse Matrix Multiplication Accelerator”, in the 24th IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2018 [Algorithms Systems] [VLSI Architectures Circuits]
  105. Li-Xuan Chuo, Zhihong Luo, Dennis Sylvester, David Blaauw, Hun-Seok Kim, “RF-Echo: A Non-Line-of-Sight Indoor Localization System Using a Low-Power Active RF Reflector ASIC Tag,” in the 23rd Annual International Conference on Mobile Computing and Networking (Mobicom) 2017 [Algorithms Systems]
  106. Mohit Shah, Sairam Arunachalam, Jingcheng Wang, David Blaauw, Dennis Sylvester, Hun-Seok Kim, Jae-sun Seo and Chaitali Chakrabarti, “A Fixed-Point Neural Network Architecture For Speech Applications on Resource Constrained Hardware, ” Journal of Signal Processing Systems doi:10.1007/s11265-016-1202-x [Algorithms Systems]
  107. Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin Kempke, Luyao Gong, Zhengya Zhang, Ronald Dreslinski, Dennis Sylvester, David Blaauw, Hun Seok Kim, “1920×1080 30fps 2.3TOPS/W Stereo Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles,” in IEEE Journal of Solid-State Circuits (JSSC), invited, 2017 [VLSI Architectures Circuits]
  108. Seokhyeon Jeong, Yu Chen, Taekwang Jang, Julius Tsai, David Blaauw, Hun-Seok Kim, Dennis Sylvester, “Always-On 12nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes,” in IEEE Journal of Solid-State Circuits (JSSC), invited, 2017 [VLSI Architectures Circuits]
  109. Taekwang Jang, Gyouho Kim, Benjamin Kempke, Michael Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David Wentzloff, David Blaauw, “Circuit and System Designs of Ultra-low Power Sensor Nodes with illustration in a miniaturized GNSS Logger for Position Tracking: Part II – Data Communication, Energy Harvesting, Power Management, and Digital Circuits,” in IEEE Transactions on Circuits and Systems I (TCAS-I) [VLSI Architectures Circuits]
  110. Taekwang Jang, Gyouho Kim, Benjamin Kempke, Michael Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David Wentzloff, David Blaauw, “Circuit and System Designs of Ultra-low Power Sensor Nodes with illustration in a miniaturized GNSS Logger for Position Tracking: Part I – Analog Circuit Techniques,” in IEEE Transactions on Circuits and Systems I (TCAS-I) [VLSI Architectures Circuits]
  111. Minchang Cho, Sechang Oh, Seokhyeon Jeong, Yiqun Zhang, Inhee Lee, Yejoong Kim, Li-Xuan Chuo, Dongkwun Kim, Qing Dong, Yen-Po Chen, Martin Lim, Mike Daneman, David Blaauw, Dennis Sylvester, and Hun-Seok Kim, “A 6x5x4mm3 General Purpose Audio Sensor Node with a 4.7uW Audio Processing IC,” in IEEE Symposium on VLSI Circuits (VLSI-Symposium) 2017 [VLSI Architectures Circuits]
  112. Yajing Chen, Shengshuo Lu, Cheng Fu, David Blaauw, Ronald Dreslinski Jr, Trevor Mudge, and Hun-Seok Kim, “A Programmable Galois Field Processor for the Internet of Things,” in ISCA ’17: Proceedings of the 43rd International Symposium on Computer Architecture [VLSI Architectures Circuits]
  113. Jaeho Im, Hun-Seok Kim, David D. Wentzloff, “A 335µW -72dBm receiver for FSK back-channel embedded in 5.8GHz Wi-Fi OFDM packets,” in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2017 [VLSI Architectures Circuits]
  114. Xing Chen, Hun-Seok Kim, David D. Wentzloff, “An Analysis of Phase Noise Requirements for Ultra-Low-Power FSK Radios,” in IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2017 [VLSI Architectures Circuits]
  115. Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin Kempke, Shijia Yang, Zhengya Zhang, Ronald Dreslinski, Dennis Sylvester, David Blaauw, Hun Seok Kim, “A 1920×1080 30fps 2.3TOPS/W Stereo-Depth Processor for Robust Autonomous Navigation, ” in IEEE International Solid-State Circuits Conference (ISSCC) 2017 [VLSI Architectures Circuits]
  116. Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim, Qing Dong, Yen-Po Chen, Laura Fick, Xun Sun, Ron Dreslinski, Trevor Mudge, Hun Seok Kim, David Blaauw, Dennis Sylvester, “A 288uW Programmable Deep-Learning Processor with 270KB On-Chip Weight Storage Using Non-Uniform Memory Hierarchy for Mobile Intelligence, ” in IEEE International Solid-State Circuits Conference (ISSCC) 2017 [VLSI Architectures Circuits]
  117. Li-Xuan Chuo, Yao Shi, Zhihong Luo, Nikolaos Chiotellis, Zhiyoong Foo, Gyouho Kim, Yejoong Kim, Anthony Grbic, David Wentzloff, Hun Seok Kim, David Blaauw, “A 915MHz Asymmetric Radio Using Q-Enhanced Amplifier for a Fully Integrated 3×3×3mm3 Wireless Sensor Node with 20m Non-Line-of-Sight Communication, ” in IEEE International Solid-State Circuits Conference (ISSCC) 2017 [VLSI Architectures Circuits]
  118. Seokhyeon Jeong, Yu Chen, Julius Tsai, David Blaauw, Hun-Seok Kim, Dennis Sylvester, “A 12nW Always-On Acoustic Sensing and Object Recognition Microsystem using Frequency-Domain Feature Extraction and SVM Classification, ” in IEEE International Solid-State Circuits Conference (ISSCC) 2017 [VLSI Architectures Circuits]
  119. Hun Seok Kim, and David D. Wentzloff, “Back-Channel Wireless Communication Embedded in WiFi-Compliant OFDM Packets,” in IEEE Journal on Selected Areas in Communications 2016 (JSAC), doi: 10.1109/JSAC.2016.2612078 [Algorithms Systems]
  120. Yajing Chen, Nicholas Chiotellis, Li-Xuan Chuo, Carl Pfeiffer, Yao Shi, Ronald Dreslinski, Anthony Grbic, Trevor Mudge, David Wentzloff, David Blaauw, and Hun Seok Kim, “Energy- Autonomous Wireless Communication for Millimeter-Scale Internet of Things Sensor Nodes,” in IEEE Journal on Selected Areas in Communications 2016 (JSAC), doi: 10.1109/JSAC.2016.2612041 [Algorithms Systems]
  121. Yu Chen, Minchang Cho, Seokhyeon Jeong, David Blaauw, Dennis Sylvester and Hun Seok Kim, “A Dual-Stage, Ultra-Low Power Acoustic Event Detection System,” in IEEE International Workshop on Signal Processing Systems (SiPS), 2016 [Algorithms Systems]
  122. Jiang Xiang, Ziyun Li, Hun Seok Kim and Chaitali Chakrabarti, “Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low Power Vision Applications,” in IEEE International Workshop on Signal Processing Systems (SiPS), 2016. Best Paper Award [Algorithms Systems]
  123. Huajun Zhang, David D. Wentzloff, and Hun Seok Kim, “Software-Defined, WiFi and BLE Compliant Back-Channel for Ultra-Low Power Wireless Communication,” in IEEE Globecom 2016 [Algorithms Systems]
  124. Jiang Xiang, Ziyun Li, David Blaauw, Hun-Seok Kim and Chaitali Chakrabarti, “Low Complexity Optical Flow Using Neighbor-Guided Semi-Global Matching,” in IEEE International Conference on Image Processing (ICIP), 2016 [Algorithms Systems]
  125. Yao Shi, Myungjoon Choi, Ziyun Li, Zhihong Luo, Gyouho Kim, Zhiyoong Foo, Hun-Seok Kim, David D. Wentzloff, and David Blaauw, “ A 10 mm3 Inductive Coupling Radio for Syringe-Implantable Smart Sensor Nodes,” in IEEE Journal of Solid-State Circuits (JSSC), VOL. 51, NO. 11, Nov. 2016 [VLSI Architectures Circuits]
  126. Wootaek Lim, Taekwang Jang, Inhee Lee, Hun Seok Kim, Dennis Sylvester, and David Blaauw, “A 380pW Dual Mode Optical Wake-up Receiver with Ambient Noise Cancellation,” in IEEE Symposium on VLSI Circuits (VLSI-Symp) 2016 [VLSI Architectures Circuits]
  127. Y. Chen, S. Lu, Hun Seok Kim, D. Blaauw, R. Dreslinski Jr, T. Mudge, “A Low Power Software-Defined-Radio Baseband Processor for the Internet of Things,” IEEE International Symposium on High-Performance Computer Architecture (HPCA) 2016 [VLSI Architectures Circuits]
  128. Yao Shi, Myungjoon Choi, Ziyun Li, Gyouho Kim, Zhiyoong Foo, Hun Seok Kim, David Wentzloff, David Blaauw, “A 10mm3 Syringe-Implantable Near-Field Radio System on Glass Substrate,” IEEE International Solid-State Circuits Conference (ISSCC) 2016 [VLSI Architectures Circuits]
  129. Yonatan Kifle, Hun Seok Kim and Jerald Yoo, “Human Body and Head Characteristics as a Communication Medium for Body Area Network”, IEEE Annual International Conference of the Engineering in Medicine and Biology Society (EMBC), Aug 2015 [Algorithms Systems]
  130. Mohit Shah, Jingcheng Wang, David Blaauw, Dennis Sylvester, Hun Seok Kim and Chaitali Chakrabarti, “A Fixed-Point Neural Network For Keyword Detection on Resource Constrained Hardware,” IEEE International Workshop on Signal Processing Systems, 2015 [Algorithms Systems]
  131. S. Chakraborty, V. Ivanov, J. Einzinger, R. Aditham, D. LeDeaut, J.-F. Ren, Hun-Seok Kim, C. Kuch, G. Dietz, M. Goel, J. Graul, “An ultra-low power, low-cost, multi-standard transceiver,” Wireless and Microwave Circuits and Systems (WMCS), 2015 Texas Symposium on, Waco, TX, 2015, pp. 1-5 [VLSI Architectures Circuits]
  132. Pat Bosshart, Glen Gibb, Hun Seok Kim, George Varghese, Nick McKeown, Martin Izzard, Fernando Mujica, and Mark Horowitz. “Forwarding metamorphosis: Fast programmable match-action processing in hardware for SDN,” In Proceedings of the ACM SIGCOMM 2013 conference on SIGCOMM, pp. 99-110. ACM, 2013 [VLSI Architectures Circuits]
  133. Eric P. Kim, Hun Seok Kim, and Manish Goel. “Coding for jointly optimizing energy and peak current in deep sub-micron VLSI interconnects,” in IEEE International Symposium on Circuits and Systems (ISCAS), 2012 [VLSI Architectures Circuits]
  134. Hun Seok Kim, and Babak Daneshrad. “Power Optimized PA Clipping for MIMO-OFDM Systems,” in IEEE Transactions on Wireless Communications (TWireless), 2011: 2823-2828 [Algorithms Systems]
  135. Hun Seok Kim, and Babak Daneshrad. “Energy-constrained link adaptation for MIMO OFDM wireless communication systems,” in IEEE Transactions on Wireless Communications (TWireless), 2010: 2820-2832 [Algorithms Systems]
  136. Hun Seok Kim; Daneshrad, B., “A Theoretical Treatment of PA Power Optimization in Clipped MIMO-OFDM Systems,” in IEEE Global Telecommunications Conference (GLOBECOM) 2009. pp.1-6, Nov. 30 2009-Dec. 4 2009 [Algorithms Systems]
  137. Hun Seok Kim, Weijun Zhu, Jatin Bhatia, Karim Mohammed, Anish Shah, and Babak Daneshrad. “A practical, hardware friendly MMSE detector for MIMO-OFDM-based systems,” in EURASIP Journal on Advances in Signal Processing 2008 (2008): 94 [Algorithms Systems] [VLSI Architectures Circuits]
  138. Hun Seok Kim, and Babak Daneshrad. “Energy-aware link adaptation for MIMO-OFDM based wireless communication,” in IEEE Military Communications Conference (MILCOM), 2008 [Algorithms Systems]
  139. Hun Seok Kim, Weijun Zhu, Jatin Bhatia, Karim Mohammed, Anish Shah, and Babak Daneshrad. “An efficient FPGA based MIMO-MMSE detector,” in 15th European Signal Processing Conference (EUSIPCO), Poznan. 2007 [VLSI Architectures Circuits]
  140. Jesse Chen, Weijun Zhu, Babak Daneshrad, Jatin Bhatia, Hun Seok Kim, Karim Mohammed, Sandeep Sasi, and Anish Shah. “A real time 4×4 MIMO-OFDM SDR for wireless networking research,” in 15th European Signal Processing Conference (EUSIPCO), Poznan. 2007 [VLSI Architectures Circuits]
  141. Weijun Zhu, Babak Daneshrad, Jatin Bhatia, Jesse Chen, Hun Seok Kim, Karim Mohammed, Omar Nasr, Sandeep Sasi, Anish Shah, and Minko Tsai. “A real time MIMO OFDM testbed for cognitive radio & networking research,” in Proceedings of the 1st international workshop on Wireless network testbeds, experimental evaluation & characterization, pp. 115-116. ACM, 2006 [VLSI Architectures Circuits]
  142. Weijun Zhu, Babak Daneshrad, Jatin Bhatia, Hun Seok Kim, Daniel Liu, Karim Mohammed, Raghu Prabhu, Minko Sasi, Anish Shah, “MIMO Systems for Military Communications,” in IEEE Military Communications Conference (MILCOM), 2006 [VLSI Architectures Circuits]

Patents

  1. Energy Efficient Computations Using Bit-Sparse Data Representations, Application #17/872,715
  2. Hardware Efficient Weight Structure for Sparse Deep Neural Networks, Application #17/674,470
  3. Wireless Neural Recording Devices And System With Two Stage RF And NIR Power Delivery And Programming, Granted, US20210244280A1
  4. Carrier and Sampling Frequency Offset Estimation for RF Communication with Crystal-less Nodes, Granted, US1149174
  5. Low-Power Receiver for FSK Back-Channel Embedded in 5.8GHz Wi-Fi OFDM Packets, Granted, US20190288887A1
  6. Peripersonal Boundary-Based Augmented Reality Game Environment, Application, 62/826,814
  7. Low-Power, Long-Range RF Localization Algorithm And System, Granted, US10746844
  8. Digital Quadrature Transmitter With Class-B I/Q Cell Sharing, Granted, US10200232
  9. Low Power High Gain Radio Frequency Amplifier For Sensor Apparatus, Granted, US20180227002A1
  10. Low Power Wireless Communication Utilizing OFDM Backchannels, Granted US9419838
  11. Relay attack countermeasure system, Granted US9584542B2
  12. Openflow match and action pipeline structure, Granted US10104004B2
  13. Structure for implementing openflow all group buckets using egress flow table entries, Granted US9419903B2
  14. Method and apparatus for packet switching, Granted US8874876
  15. Packet processing match and action unit with stateful actions, Application US20140244966
  16. Packet processing match and action unit with configurable bit allocation, Granted US9826067B2
  17. Packet processing match and action unit with a VLIW action engine, Granted US10009276B2
  18. Packet processing match and action unit with configurable memory allocation, Granted US9712439B2
  19. Reduced complexity hashing, Granted US9646105B2
  20. Packet processing VLIW action unit with OR-multi-ported instruction memory, Granted US9258224B2
  21. Methods and apparatus for determining nearfield localization using phase and RSSI diversity, Granted US9571163B1
  22. Interconnect coding method and apparatus, Granted US8392804
  23. Receiver power saving via block code failure detection, Granted US8392804
  24. Method, device, and digital circuitry for providing a closed-form solution to a scaled error locator polynomial used in BCH decoding, Granted US8392806
  25. Signal decoder with general purpose calculation engine, Granted US 8295381
  26. Scalable VLSI architecture for K-best breadth-first decoding, Granted US 7889807
  27. Smart routing method based on a relative distance between nodes in communication system using shared medium, Granted, KR1020040048946
  28. Communication system using repeater function and method, Granted, KR1020010069092